An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC

Soon Jae Kweon; Joonho Gil; Chulhyun Park; Sein Oh; Yoontae Jung; Injun Choi; Song I. Cheon; Hung Phan Dang; Ja Hyuck Koo; Geunhoe Kim; Sohmyung Ha; Minkyu Je

doi:10.23919/VLSICircuits52068.2021.9492406

An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC

Soon Jae Kweon
, Joonho Gil
, Chulhyun Park
, Sein Oh
, Yoontae Jung
, Injun Choi
, Song I. Cheon
, Hung Phan Dang
, Ja Hyuck Koo
, Geunhoe Kim
, Sohmyung Ha
, Minkyu Je

Nemesis Co. Ltd.
Korea Advanced Institute of Science and Technology
New York University Abu Dhabi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

13 Scopus citations

Abstract

We present an impedance-monitoring IC achieving a wide frequency range (FR) and fast output data rate (ODR). The proposed IC support a wide FR with improved spectral density by down-converting the signal to the intermediate frequency (fIF) in front of the instrumentation amplifier (IA) using the LO signal generated by a single-side-band (SSB) mixer. The proposed IF-sampling architecture does not require narrow-bandwidth (BW) low-pass filter (LPF), resulting in a fast ODR. A time-interleaved (TI) DFT is also employed to further improve the ODR. A band-pass delta-sigma ADC (BP-ΔΣ-ADC) with the auto-calibration and BP truncation is adopted to achieve the best noise performance at fIF. The fabricated IC achieves 0.35ΩRMS resolution in the FR from 4kHz to 8MHz with 122.1Hz BW while providing the ODR up to 31.25kS/s.

Original language	English
Title of host publication	2021 Symposium on VLSI Circuits, VLSI Circuits 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9784863487796
DOIs	https://doi.org/10.23919/VLSICircuits52068.2021.9492406
State	Published - 13 Jun 2021
Event	35th Symposium on VLSI Circuits, VLSI Circuits 2021 - Virutal, Online Duration: 13 Jun 2021 → 19 Jun 2021

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume	2021-June

Conference

Conference	35th Symposium on VLSI Circuits, VLSI Circuits 2021
City	Virutal, Online
Period	13/06/21 → 19/06/21

Bibliographical note

Publisher Copyright:
© 2021 JSAP.

Access to Document

10.23919/VLSICircuits52068.2021.9492406

Cite this

Kweon, S. J., Gil, J., Park, C., Oh, S., Jung, Y., Choi, I., Cheon, S. I., Dang, H. P., Koo, J. H., Kim, G., Ha, S., & Je, M. (2021). An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. In 2021 Symposium on VLSI Circuits, VLSI Circuits 2021 Article 9492406 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2021-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSICircuits52068.2021.9492406

@inproceedings{d25326eeacf64dd3921871fa574acfa5,

title = "An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC",

abstract = "We present an impedance-monitoring IC achieving a wide frequency range (FR) and fast output data rate (ODR). The proposed IC support a wide FR with improved spectral density by down-converting the signal to the intermediate frequency (fIF) in front of the instrumentation amplifier (IA) using the LO signal generated by a single-side-band (SSB) mixer. The proposed IF-sampling architecture does not require narrow-bandwidth (BW) low-pass filter (LPF), resulting in a fast ODR. A time-interleaved (TI) DFT is also employed to further improve the ODR. A band-pass delta-sigma ADC (BP-ΔΣ-ADC) with the auto-calibration and BP truncation is adopted to achieve the best noise performance at fIF. The fabricated IC achieves 0.35ΩRMS resolution in the FR from 4kHz to 8MHz with 122.1Hz BW while providing the ODR up to 31.25kS/s.",

author = "Kweon, \{Soon Jae\} and Joonho Gil and Chulhyun Park and Sein Oh and Yoontae Jung and Injun Choi and Cheon, \{Song I.\} and Dang, \{Hung Phan\} and Koo, \{Ja Hyuck\} and Geunhoe Kim and Sohmyung Ha and Minkyu Je",

note = "Publisher Copyright: {\textcopyright} 2021 JSAP.; 35th Symposium on VLSI Circuits, VLSI Circuits 2021 ; Conference date: 13-06-2021 Through 19-06-2021",

year = "2021",

month = jun,

day = "13",

doi = "10.23919/VLSICircuits52068.2021.9492406",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Kweon, SJ, Gil, J, Park, C, Oh, S, Jung, Y, Choi, I, Cheon, SI, Dang, HP, Koo, JH, Kim, G, Ha, S & Je, M 2021, An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. in 2021 Symposium on VLSI Circuits, VLSI Circuits 2021., 9492406, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, vol. 2021-June, Institute of Electrical and Electronics Engineers Inc., 35th Symposium on VLSI Circuits, VLSI Circuits 2021, Virutal, Online, 13/06/21. https://doi.org/10.23919/VLSICircuits52068.2021.9492406

An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. / Kweon, Soon Jae; Gil, Joonho; Park, Chulhyun et al.
2021 Symposium on VLSI Circuits, VLSI Circuits 2021. Institute of Electrical and Electronics Engineers Inc., 2021. 9492406 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2021-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kweon, Soon Jae

AU - Gil, Joonho

AU - Park, Chulhyun

AU - Oh, Sein

AU - Jung, Yoontae

AU - Choi, Injun

AU - Cheon, Song I.

AU - Dang, Hung Phan

AU - Koo, Ja Hyuck

AU - Kim, Geunhoe

AU - Ha, Sohmyung

AU - Je, Minkyu

PY - 2021/6/13

Y1 - 2021/6/13

N2 - We present an impedance-monitoring IC achieving a wide frequency range (FR) and fast output data rate (ODR). The proposed IC support a wide FR with improved spectral density by down-converting the signal to the intermediate frequency (fIF) in front of the instrumentation amplifier (IA) using the LO signal generated by a single-side-band (SSB) mixer. The proposed IF-sampling architecture does not require narrow-bandwidth (BW) low-pass filter (LPF), resulting in a fast ODR. A time-interleaved (TI) DFT is also employed to further improve the ODR. A band-pass delta-sigma ADC (BP-ΔΣ-ADC) with the auto-calibration and BP truncation is adopted to achieve the best noise performance at fIF. The fabricated IC achieves 0.35ΩRMS resolution in the FR from 4kHz to 8MHz with 122.1Hz BW while providing the ODR up to 31.25kS/s.

AB - We present an impedance-monitoring IC achieving a wide frequency range (FR) and fast output data rate (ODR). The proposed IC support a wide FR with improved spectral density by down-converting the signal to the intermediate frequency (fIF) in front of the instrumentation amplifier (IA) using the LO signal generated by a single-side-band (SSB) mixer. The proposed IF-sampling architecture does not require narrow-bandwidth (BW) low-pass filter (LPF), resulting in a fast ODR. A time-interleaved (TI) DFT is also employed to further improve the ODR. A band-pass delta-sigma ADC (BP-ΔΣ-ADC) with the auto-calibration and BP truncation is adopted to achieve the best noise performance at fIF. The fabricated IC achieves 0.35ΩRMS resolution in the FR from 4kHz to 8MHz with 122.1Hz BW while providing the ODR up to 31.25kS/s.

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DO - 10.23919/VLSICircuits52068.2021.9492406

M3 - Conference contribution

AN - SCOPUS:85111873611

T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers

BT - 2021 Symposium on VLSI Circuits, VLSI Circuits 2021

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 35th Symposium on VLSI Circuits, VLSI Circuits 2021

Y2 - 13 June 2021 through 19 June 2021

ER -

Kweon SJ, Gil J, Park C, Oh S, Jung Y, Choi I et al. An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. In 2021 Symposium on VLSI Circuits, VLSI Circuits 2021. Institute of Electrical and Electronics Engineers Inc. 2021. 9492406. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). doi: 10.23919/VLSICircuits52068.2021.9492406

An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC

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