An analytical framework for imperfect DS-CDMA closed-loop power control over flat fading

Sangho Choe

doi:10.4218/etrij.05.0205.0032

An analytical framework for imperfect DS-CDMA closed-loop power control over flat fading

Sangho Choe

School of Information, Communications and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

This letter presents an analytical framework for a performance analysis of the imperfect direct-sequence code division multiple access (DS-CDMA) closed-loop power control (CLPC) loop with loop delay, channel estimation error, and power control command bit error as the parameters under a Rayleigh flat fading environment. The proposed model is verified through a comparison between analytical results and simulation ones.

Original language	English
Pages (from-to)	810-813
Number of pages	4
Journal	ETRI Journal
Volume	27
Issue number	6
DOIs	https://doi.org/10.4218/etrij.05.0205.0032
State	Published - Dec 2005

Keywords

Closed loop power control
Rayleigh fading

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10.4218/etrij.05.0205.0032

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@article{6d2377ce526a4f899e5ba4bb44a393ce,

title = "An analytical framework for imperfect DS-CDMA closed-loop power control over flat fading",

abstract = "This letter presents an analytical framework for a performance analysis of the imperfect direct-sequence code division multiple access (DS-CDMA) closed-loop power control (CLPC) loop with loop delay, channel estimation error, and power control command bit error as the parameters under a Rayleigh flat fading environment. The proposed model is verified through a comparison between analytical results and simulation ones.",

keywords = "Closed loop power control, Rayleigh fading",

author = "Sangho Choe",

year = "2005",

month = dec,

doi = "10.4218/etrij.05.0205.0032",

language = "English",

volume = "27",

pages = "810--813",

journal = "ETRI Journal",

issn = "1225-6463",

publisher = "John Wiley \& Sons Inc.",

number = "6",

}

TY - JOUR

T1 - An analytical framework for imperfect DS-CDMA closed-loop power control over flat fading

AU - Choe, Sangho

PY - 2005/12

Y1 - 2005/12

N2 - This letter presents an analytical framework for a performance analysis of the imperfect direct-sequence code division multiple access (DS-CDMA) closed-loop power control (CLPC) loop with loop delay, channel estimation error, and power control command bit error as the parameters under a Rayleigh flat fading environment. The proposed model is verified through a comparison between analytical results and simulation ones.

AB - This letter presents an analytical framework for a performance analysis of the imperfect direct-sequence code division multiple access (DS-CDMA) closed-loop power control (CLPC) loop with loop delay, channel estimation error, and power control command bit error as the parameters under a Rayleigh flat fading environment. The proposed model is verified through a comparison between analytical results and simulation ones.

KW - Closed loop power control

KW - Rayleigh fading

UR - https://www.scopus.com/pages/publications/30644470065

U2 - 10.4218/etrij.05.0205.0032

DO - 10.4218/etrij.05.0205.0032

M3 - Article

AN - SCOPUS:30644470065

SN - 1225-6463

VL - 27

SP - 810

EP - 813

JO - ETRI Journal

JF - ETRI Journal

IS - 6

ER -

An analytical framework for imperfect DS-CDMA closed-loop power control over flat fading

Abstract

Keywords

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